Cypress USB MCU CYUSB3014 CY7C68013A CY7C65632等全系列原理图库+PCB封装库（AD集成库）.IntLib后缀文件，拆分后文件为PcbLib+SchLib格式，Altium Designer原理图库+PCB封装库，集成库型号列表如下： Library Component Count : 169 Name Description ---------------------------------------------------------------------------------------------------- CY7C63310-SXC enCoRe(TM) II Low Speed USB Peripheral Controller, 3 KB, 14 I/Os, 4 to 5.5 V, 0 to 70 degC, 16-Pin SOIC (SX16), Tube CY7C63413C-PVXC Low-Speed High Input / Output 1.5-Mbps USB Controller, 8 KB, 32 I/Os, 4 to 5.5 V, 0 to 70 degC, 48-Pin SSOP (PVX48), Tube CY7C63413C-PVXCT Low-Speed High Input / Output 1.5-Mbps USB Controller, 8 KB, 32 I/Os, 4 to 5.5 V, 0 to 70 degC, 48-Pin SSOP (PVX48), Tape and Reel CY7C63513C-PVXC Low-Speed High Input / Output 1.5-Mbps USB Controller, 8 KB, 40 I/Os, 4 to 5.5 V, 0 to 70 degC, 48-Pin SSOP (PVX48), Tube CY7C63613C-SXC Low-Speed High Input / Output 1.5-Mbps USB Controller, 8 KB, 16 I/Os, 4 to 5.5 V, 0 to 70 degC, 24-Pin SOIC (SX24), Tube CY7C63801-SXC enCoRe(TM) II Low Speed USB Peripheral Controller, 4 KB, 14 I/Os, 4 to 5.5 V, 0 to 70 degC, 16-Pin SOIC (SX16), Tube CY7C63803-LQXC enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 14 I/Os, 4 to 5.5 V, 0 to 70 degC, 24-Pin QFN (LQX24), Tray CY7C63803-SXC enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 14 I/Os, 4 to 5.5 V, 0 to 70 degC, 16-Pin SOIC (SX16), Tube CY7C63803-SXCT enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 14 I/Os, 4 to 5.5 V, 0 to 70 degC, 16-Pin SOIC (SX16), Tape and Reel CY7C63813-PXC enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 16 I/Os, 4 to 5.5 V, 0 to 70 degC, 18-Pin PDIP (PX18), Tube CY7C63813-SXC enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 16 I/Os, 4 to 5.5 V, 0 to 70 degC, 18-Pin SOIC (SX18), Tube CY7C63823-QXC enCoRe(TM) II Low Speed USB Peripheral Controller, 8 KB, 20 I/Os, 4 to 5.5 V, 0 to 70 degC, 24-Pin QSOP (QX24), Tube CY7C63823-SXC

Altera cyclone III -DDR2-USB3.0 (CYUSB3014)FPGA开发套件光盘资料硬件原理图+VERILOG逻辑例程

Cypress_CYUSB3014 + cyclone3 EP3C40F484C8N -DDR2-USB3.0 fpga开发板Cadence硬件原理图+PCB, 可以做为你的设计参考。

cyclone III -DDR2-USB3.0(CYUSB3014) Fpga开发板资料程序实例f Cadence硬件原理图+PCB+Verilog例程源码+文档资料

Altera_cyclone III -DDR2-USB3.0(CYUSB3014) 开发板cadence orcad硬件原理图+PCB文件,Cadence Allegro设计文件，可作为你产品设计的参考。

USB3.0是新一代USB总线，带宽到5Gbps。 基于cyusb3014的usb3.0官方开发板原理图，对于USB3.0开发来说具有重要的参考价值。

cypress的usb3.0芯片，cyusb3014开发板入门,包括jlink调试、cyusb3014的新工程建立过程等。

利用USB 3.0控制器芯片CYUSB3014实现FPGA与上位机之间的高宽带数据传输系统

完整版中文数据手册

利用 EZ-USB® FX3 从器件 FIFO 接口进行设计, 官方文档, cyusb3014